国際会議SC25における展示
情報連携推進本部および情報基盤センターでは,共同研究・共同利用拠点の提供計算機資源, サービス業務,および研究活動のアウトリーチを目的として, 2025年11月16日~21日米国ミズーリ州セントルイスで開催される 国際会議SC25にて展示を行います.
・展示期間:2025年11月17日~20日
・展示ブース:♯4144
ショートトークのスケジュール
Monday, 17 November 2025 (In Opening Gala)
- 19:15-19:30 Franz Franchetti (Carnegie Mellon University, USA)
- Updates from the SPIRAL World
Abstract: We present a number of updates related to the SPIRAL system (www.spiral.net):
1) We show early results of the "integrated algorithm" approach for larger FFT-based kernels used in PDE solvers and signal processing.
2) We give a brief preview on communication avoiding convolution algorithms.
3) We provide an update on core SPIRAL infrastructure work that exports the SPIRAL language as C++ class library and makes SPIRAL a linkable library.
4) We provide updates on semantic lifting for FFT-based operations.
5) Finally, we sketch a path towards an emerging SPIRAL Software Foundation to ensure the long-term survival of the technology.
- 19:30-19:45 Satoshi Ohshima (Kyushu University, Japan)
- Considering "Allcore computing"
Abstract: While GPU performance has improved significantly, CPU performance has also advanced, and processors like Grace Hopper that integrate CPUs and GPUs have become available. Therefore, we want to explore how to fully utilize both CPUs and GPUs to achieve further performance gains. This talk will introduce ideas and experimental results for accelerating block matrix computations through CPU and GPU collaboration.
- 19:45-20:00 Yuki Satake
- Redesigning Krylov subspace methods for solving large Sylvester matrix equations
Abstract: In this talk, we consider solving large Sylvester matrix equations with a low-rank right-hand side.
Since the Sylvester equation can be regarded as a linear system, one can directly apply Krylov subspace methods to the equation.
However, such straightforward algorithms require storing all elements of large dense matrices and are therefore impractical.
To address this issue, we investigate the mathematical structure of the Krylov subspace and redesign the algorithms. Finally, we propose efficient algorithms based on Krylov subspace methods that compute low-rank approximate solutions.
Tuesday, 18 November 2025
- 13:00-13:15
- Title:
Abstarct:
- Title:
- 13:15-13:30 Daichi Mukunoki (Nagoya University, Japan)
- DGEMM using FP64 Arithmetic Emulation and FP8 Tensor Cores with Ozaki Scheme
Abstarct: For AI computation, recent processors have shifted their design focus from accelerating integer operations to enhancing low-precision floating-point performance.
While earlier Ozaki-scheme extensions exploited integer arithmetic to emulate DGEMM efficiently, this architectural trend motivates the use of low-precision floating-point operations instead.
In this study, we implement and evaluate DGEMM based on the Ozaki scheme using FP8 Tensor Cores (TCs) and further develop FP64 arithmetic emulation required for processors lacking hardware double precision.
Experimental results show that FP8-based DGEMM achieves performance comparable to or exceeding that of FP16 TCs, while the performance loss from FP64 arithmetic emulation is negligible.
- 13:30-13:45 Shinji Sumimoto (The University of Tokyo, Japan)
- Current Status of WaitIO Development
Abstract: In this presentation, we will discuss the development status of WaitIO, a framework that enables weakly coupled computations across heterogeneous systems.
We will introduce WaitIO-Router, which facilitates HPC-QC hybrid collaboration, as well as WaitIO4Py for Python integration and WaitIO4Julia for multi-language coupling.
- 13:45-14:00 Kazuhiko Komatsu (Tohoku University, Japan)
- Feasibility study of Hybrid Computing Environments Integrating Quantum Computing Technologies with High-Performance Computing Infrastructure (HPCI)
Abstract: This project aims to establish a hybrid computing environment that integrates quantum computing technologies with Japan’s High-Performance Computing Infrastructure (HPCI).
Through collaboration among universities, research institutes, and industry partners, we investigate operational frameworks, software interfaces, and performance requirements for hybrid systems.
Our goal is to define the technical roadmap toward quantum-classical integration and to strengthen Japan’s leadership in quantum-inspired computing.
Wednesday, 19 November 2025
- 13:30-13:45 Akihiro Fujii (Kogakuin University, Japan)
- Acceleration of Molecular Dynamics Simulations of Myosin and Actin Systems
Abstract: We will discuss the acceleration method of simulation of biomolecules such as myosin and actin.
In molecular simulations, when the random forces arising from the Brownian motion acting on biomolecules are approximated, the integration time step must be on the order of nanoseconds to maintain computational accuracy. Consequently, to achieve simulation results on the time scale of seconds, approximately 10⁹–10¹⁰ integration steps are required, which becomes the primary computational bottleneck.
In this presentation, we will introduce a method to enlarge the time step in order to overcome this bottleneck, along with experimental results.
- 13:45-14:00 Takahiro Katagiri (Nagoya University, Japan)
- The Latest Status Report of the HPC-GENIE Project
Abstract: This presentation reports on the latest progress of HPC-GENIE, a project at Nagoya University aimed at automatic generation of HPC programs using code-generating AI.
HPC-GENIE introduces multi-AI agent systems based on Vibe Coding, which support program parallelization and GPU acceleration, dramatically improving the productivity of high-performance computing software development and addressing the shortage of skilled engineers. In this talk, we will present the latest results of VibeCodeHPC, the prototype system developed in this project.
- 14:00-14:15 Masatoshi Kawai (Tohoku University, Japan)
- Dynamic Core Binding: Improving Performance and Power Efficiency for Fat-Node Supercomputers
Abstract: In recent years, advances in CPUs and GPUs have led to the development of supercomputers with fat nodes, where each node is equipped with a large number of computational resources.
To utilize such systems efficiently, node-level optimization has become increasingly important.
However, for many applications, even improving simple parallel efficiency is a challenging task, and it is even more difficult to achieve optimization at the node level.
In this study, we introduce Dynamic Core Binding (DCB), a library that enables intra-node application optimization.
This library dynamically assigns processor cores to processes according to their workload, providing an optimal balance between computation time and power efficiency. As a result, DCB achieves improved performance and reduced power consumption of whole system.
SC25展示ポスター
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| History of ITC-NU | Supercomputer "Flow" system overview | HPCI and JHPCN |
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| Research_Katagiri-HPC-GENIE-SC25-rev.0 | Research_Katagiri-QuantumFS30-rev.1 | Research_Hoshino | Research_Mukunoki |












